View LX1725_1268643.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
DESCRIPTION
KEY FEATURES 12Wx2 @ 4 THD+N<1% 16Wx2 @ 4 THD+N<10% 25W BTL @ 8 THD+N<1% 32W BTL @ 8 THD+N<10% High Efficiency: >90% @8 Full Audio Band: 20Hz~20KHz Low Distortion: <0.1% @1KHz, 8 <0.4% @20~20KHz, 8 High Signal-to-Noise Ratio: >85dB non A-Weighted Split/Single Power Supply Wide Supply Voltage Range: 6V ~ 15V or 12V ~ 30V Low Quiescent Current <20mA Turn ON/OFF POP Free STANDBY/MUTE Feature Programmable Gain 14/20/26dB Built-in Over Current Protection Built-in Under Voltage Lockout Thermal Shut Down Power Limiting Based on Die Temperature (gain fold back) Synchronization
The Microsemi LX1725 is part of a new generation of fully integrated stereo class-D amplifiers from Microsemi. The fully integrated halfbridge output for each channel works with both split and single power supply operation. The outputs can be bridged to run in BTL (Bridge Tied Load) mode. In BTL mode, 3-level modulation is used which allow operation without an L-C filter to reduce system cost and area. The LX1725 has >90% efficiency, with typical output power up to 15W+15W in stereo, and 30W BTL into a 4 load with less than 1% THD+N. The amplifier operates over a wide supply voltage range of 6V to 15V split supply or 12V to 30V single supply, and consumes a very little quiescent current.
The LX1725 features Mute and Standby modes, over-current protection, POP-free turn-on and turn-off, undervoltage lockout, over-voltage protection and over-temperature protection. All built-in protection modes allow automatic recovery when the fault condition has been cleared. The gain is pin selectable between 14 / 20 / 26dB to accommodate different signal source amplitudes. Several LX1725s can be easily synchronized together to prevent beat frequency interference in multichannel applications.. The LX1725 comes in a MLPQ 32 pin package with a 7mmx7mm small outline surface mount.
WWW .Microsemi .C OM
IMPORTANT: For the most current data, consult MICROSEMI's website: http://www.microsemi.com
PRODUCT HIGHLIGHT
VCOM IN1P 1F IN1N 1F
32 IN1P 31 30 29 28 27 26 VCOM 25
HIGAIN +5V 4.7F 35V VCOM
APPLICATIONS
STBY
VPOS VCOM Sychronize FLAG 1F 35V R LIM
1 2 3 4 5 6 7
VPOSA
24
STBY
VPOS
23 22 21 20 19 18 17
VCOMA SYNC FLAG RILIM VREF
VPOS1 OUT1
22H VNEG 820nF 22H
LX1725
OUTREF2
VNEG1 VNEG2 OUT2 VPOS2 VNEGA
VGND MASTER MUTE
820nF
LCD TV, PDP Sets CD/DVD Combo Player Combo DVD 5.1 Amplifier Home Theater System Computer Speaker System Game Machine
OUTREF1
IN2M
C OSC VNEG
COSC N.C.
IN2P
HIGAIN
N.C.
IN1M
N.C.
V5V
8
9
10
11
12
N.C.
VNEGA
VPOS
13
14
15
16
IN2P
1F Master / Slave 1F MUTE / GAIN VNEGA
IN2N VCOM
LX1725 LX1725
PACKAGE ORDER INFO
TJ(C) -40 to +85
LQ
Plastic MLPQ 32-PIN
RoHS Compliant / Pb-free
LX1725ILQ
Note: Available in Tape & Reel. Append the letters "TR" to the part number. (i.e. LX1725ILQ-TR)
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
1
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
ABSOLUTE MAXIMUM RATINGS Supply Voltage (VPOS/VNEG, VPOSA/VNEGA)......................... -0.3V to 15V or 30V Common Supply Voltage (VCOM, VCOMA)................................. -0.3V to 15V or 30V Analog Supply Voltage (V5V)..........................................................................-0.3 to 7.0V Input Voltage (IN1P, IN1M, IN2P, IN2M).......................................................-0.3 to 7.0V Standby and Mute Voltage (STBY, MUTE).....................................................-0.3 to 7.0V Synchronization Input Voltage (MASTER, SYNC) .........................................-0.3 to 7.0V Operating Temperature ...............................................................................-40C to +85C Maximum Operating Junction Temperature ............................................................. 150C Storage Temperature................................................................................... -65C to 150C Peak Package Solder Reflow Temp.(40 second maximum exposure) ......... 260C (+0, -5) Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. THERMAL DATA
PACKAGE PIN OUT
OUTREF1
WWW .Microsemi .C OM
HIGAIN
VCOM
IN1M
31
IN1P
32
N.C. N.C.
30 29
V5V
26
28
27
25 24 23 22 21 20 19 18 17
VPOSA VCOMA SYNC FLAG RILIM VREF COSC VNEGA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
STBY VPOS1 OUT1 VNEG1 VNEG2 OUT2 VPOS2 MASTER
LQ
Plastic MLPQ 32-Pin 1.12C/W 15.5C/W
THERMAL RESISTANCE-JUNCTION TO CASE, JC
Center Pad is VNEG N.C. - No Internal Connection
RoHS / Pb-free 100% Matte Tin Lead Finish
IN2P
IN2M
LQ PACKAGE
(Top View)
N.C.
N.C.
OUTREF2
VNEGA
VGND
MUTE
THERMAL RESISTANCE-JUNCTION TO AMBIENT, JA
Junction Temperature Calculation: TJ = TA + (PD x JA). The JA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow.
FUNCTIONAL PIN DESCRIPTION Name VPOSA VCOMA SYNC FLAG Description Analog voltage sense for VPOS voltage. Needs to be protected from noise at VPOS1 and VPOS2. Connect to VPOS bus with appropriate filtering. For VPOSA - VNEGA less than 10V, the under voltage lockout circuit will keep the part in sleep mode. Typically 250A is drawn at this pin. Analog voltage sense for VCOM voltage. Typically 150A is drawn at this pin. Bi-directional clock signal pin. In Master mode, this pin outputs the clock to other slave units. In Slave mode, this pin is a clock input. CMOS logic levels. Monitor point that indicates a fault has been detected. This pin goes high during the power on reset period, when current limiting is in effect, when the voltage at VPOS - VNEG is less than 10V or greater than 33V, when the V5V voltage is less than 4V, and when an over-temperature condition is detected. CMOS logic levels. A current limit-programming resistor should be connected between this pin and ground. A 50K resistor will give a 3.75A current limit threshold. This pin may be connected to V5V in which case both current limiting protection and over-voltage protection will be disabled. 2.25V reference voltage, used as a local "gnd" reference. Place a decoupling capacitor greater than 1F between this pin and VGND. This pin will be prone to instability for capacitor values less than this. In applications where more several LX1725s are synchronized together, the VREF pins should all be tied together so that all units use a common VREF voltage. Place a capacitor between this pin and VGND to generate the PWM triangle wave. A 125pF capacitor will give an oscillation frequency of about 373KHz. In Master mode, this pin serves as the output for the triangle wave. In Slave mode, this pin is an input. The total capacitance on this pin will determine the frequency of oscillation.
RILIM
PACKAGE DATA PACKAGE DATA
VREF
COSC
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
2
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
FUNCTIONAL PIN DESCRIPTION (CONTINUED) Name VNEGA IN2P IN2M OUTREF2 VGND MUTE Description Analog voltage sense for VNEG voltage. Needs to be protected from noise at VNEG1 and VNEG2. Typically, about 180A is sourced out of this pin. Positive audio input for channel 2. The input signal should be AC-coupled into this pin. The DC bias voltage will be equal to VREF. The input impedance to VREF will be about 17Kohm. Negative audio input for channel 2. The input signal should be AC-coupled into this pin. The DC bias voltage will be equal to VREF. The input impedance to VREF will be about 17Kohm. Negative feedback input pin for channel 2. Normally connected to VCOM. Ground reference return for the analog +5V power supply. This supply is allowed to "float" between VNEG and VCOM. Typical current out of this pin is about 600A. Tri-level control pin. When this pin is set to greater than V5V/2, the audio signal path is muted. For voltages between V5V/4 and V5V/2, the audio gain will be set to approximately 5V/V. This allows the "Low Gain" mode to be tested. For voltages less than V5V/4, the normal 10V/V gain is in place. Quad-level control pin. This pin has three thresholds to enable Master/Slave and the "Quick" test mode. Quick mode forces the internal 65224 clock counter to be bypassed in order to speed-up production testing. Here is how the various modes are mapped: V @ Master Mode < V5V/4 Slave, Normal Mode < V5V/2, >V5V/4 Slave, Quick mode < 3*V5V/4, >V5V/2 Master, Quick mode > 3*V5V/4 Master, Normal mode Normally, this pin should be shorted to either V5V or GND. Positive voltage supply to channel 2's output buffer. In a split supply system, this voltage will range between +5V up to +15V. In a single supply system, this voltage is allowed to be +10V up to +30V. Power supply de-coupling capacitance should be placed between VPOS2 and VNEG2. PWM output for channel 2. This pin drives the L-C low pass filter prior to driving the speaker. Negative voltage supply to channel 2's output buffer. In a split supply system, this voltage will range between - 5V down to -15V. In a single supply system, this represents the 0V point. Negative voltage supply to channel 1's output buffer. In a split supply system, this voltage will range between - 5V down to -15V. In a single supply system, this represents the 0V point. PWM output for channel 1. This pin drives the L-C low pass filter prior to driving the speaker. Positive voltage supply to channel 1's output buffer. In a split supply system, this voltage will range between +5V up to +15V. In a single supply system, this voltage is allowed to be +10V up to +30V. Power supply de-coupling capacitance should be placed between VPOS1 and VNEG1. A logic high as this pin forces a zero current standby mode. CMOS logic levels. Mid-voltage supply for both channel 1 and channel 2. This voltage should be half way between VPOS and VNEG. De-coupling capacitance should be placed between this pin and both VPOS and VNEG. Analog +5V supply for the signal processing section. This pin is referenced to VGND. For voltages less than 4V, the under voltage lockout circuit will keep the part in sleep mode. De-coupling capacitance should be placed between this pin and VGND.
WWW .Microsemi .C OM
MASTER
VPOS2 OUT2 VNEG2 VNEG1 OUT1 VPOS1 STBY VCOM V5V
PACKAGE DATA PACKAGE DATA
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
3
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
FUNCTIONAL PIN DESCRIPTION (CONTINUED) Name HIGAIN OUTREF1 IN1M IN1P Description High Gain mode control pin. If connected to V5V gives +6dB more gain. Negative feedback input pin for channel 1, normally connected to VCOM. Negative audio input for channel 1. The input signal should be AC-coupled into this pin. The DC bias voltage will be equal to VREF. The input impedance to VREF will be about 17Kohm. Positive audio input for channel 1. The input signal should be AC-coupled into this pin. The DC bias voltage will be equal to VREF. The input impedance to VREF will be about 17Kohm.
WWW .Microsemi .C OM
PACKAGE DATA PACKAGE DATA
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
4
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS Notes: Unless otherwise specified, the following specifications apply over the operating ambient temperature TA = -40 ~ +85CC except where otherwise noted (typical @ TA = 25C) and the following test conditions: VPOS = +12V, VNEG = -12V, VGND = 0V, V5V = 5V, VCOM = 0V RILIM = 50Kohm, COSC = 220pF, RL = 8.
Parameter OSCILLATOR Oscillator Frequency Voltage Stability Temperature Stability POWER SUPPLY Supply Voltage Stand-By Current Operating Current GAIN High Gain Mode Normal Gain Low Gain Mute Gain OFFSET Output DC Offset INPUT STAGE Input Resistance Common Mode Voltage Common Mode Rejection Ratio OUTPUT STAGE PFET On resistance NFET On resistance GHIGH GNOM GLOW GMUTE Voff RIN VCM CMRR RDSONp RDSONn VPOS/VNEG V5V VCOM to GND VNEG to GND @ Single Power Supply STBY Enable, TA = 25C @ V5V STBY Disabled, MUTE Enabled @ V5V POUT = 4W, F = 1kHz, VMUTE = VGND, HIGAIN = V5V Pout=1W, F=1KHz, VMUTE = VGND, HIGAIN = VGND Pout=0.25W, F=1KHz, V5V / 4 < VMUTE < V5V / 2, HIGAIN = VGND Input 2Vpp, F=1KHz, VMUTE = V5V Measured WRT VCOM Single-ended 17 2.29 60 VPOS = 12V, VNEG = -12V, Ids = 0.2A VPOS = 12V, VNEG = -12V, Ids = 0.2A GBNT ** Any 4 out of 5 clock periods VPOS - VNEG 10 0.38 3.8 550 550 3.75 4 12 1 4 125 150 13.2 1.78 900 900 6 12 4.5 12 24 5.0 15 18 9 4.5 22 11 5.5 0.01 100 15 30 5.5 250 20 26 13 6.5 0.045 170 27 V A mA V/V V/V V/V V/V mV K V dB m m A FOSC Varies with COSC capacitor value, value shown is for default conditions. VPOS-VNEG = 12V to 30V TA = 0C to 70C TA = -40C to 85C 160 220 280 10 5 8 KHz % % % Symbol Test Conditions Min LX1725 Typ Max Units
WWW .Microsemi .C OM
CURRENT LIMIT Current Limit Threshold Ith Pulse Qualification Count Icount VOLTAGE THRESHOLDS AT VPOS - VNEG Under Voltage Threshold Start Threshold Hysteresis UNDER VOLTAGE LOCK-OUT @ V5V Start Threshold Voltage THERMAL Thermal Gain Fold Back Junction Temperature Thermal shut off Junction Temperature
V V V C C
ELECTRICALS ELECTRICALS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
5
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS (CONTINUED) Notes: Unless otherwise specified, the following specifications apply over the operating ambient temperature TA = -40 ~ 85C except where otherwise noted (typical @ TA = 25C) and the following test conditions: VPOS=+12V, VNEG=-12V, VGND = 0V, V5V = 5V, VCOM = 0V RILIM = 50Kohm, COSC = 220pF, RL=8.
Parameter MUTE / STBY / MASTER SECTION MUTE Threshold STBY Threshold STBY To Output Enable Master Threshold Mute Mode @ V5V = 5.0V Low Gain Mode @ V5V = 5.0V Normal Gain Mode @ V5V = 5.0V @ V5V = 5.0V After Power on Reset Pulse, Not Quick Mode Master, Not Quick Mode @ V5V = 5.0V Master, Quick Mode @ V5V = 5.0V Slave, Quick Mode @ V5V = 5.0V Slave, Not Quick Mode @ V5V = 5.0V 2.5 1.25 2.60 65536 3.75 2.50 1.25 3.75 2.50 1.25 2.5 1.25 2.85 V V Clocks V Symbol Test Conditions Min LX1725 Typ Max Units
WWW .Microsemi .C OM
* RDSONP and RDSONN include all bond wires and pad resistance. ** GBNT - Guarantee by design and system, no test.
ELECTRICALS ELECTRICALS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
6
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
SYSTEM MODULE CHARACTERISTICS Notes: Unless otherwise specified, the following specifications apply over the operating ambient temperature TA = 25C except where otherwise noted and the following test conditions: VPOS=+12V, VNEG=-12V, VGND = 0V, V5V = 5V, VCOM = 0V RILIM = 50Kohm, COSC = 220pF, Output LC filter 47uH/0.68uF, RL=8, Test equipment built-in BPF 10Hz~22KHz.
Parameter AUDIO CHARACTERISTICS RL=8 Output Power Stereo RL=4 Output Power BTL RL=8 RL=8 RL=4 Total Harmonic Distortion BTL Power Efficiency RL=8 Power Efficiency RL=4 Channel Crosstalk Audio Bandwidth HIGH Stage Gain MID LOW Mute Output Signal to Noise Ratio Output Noise Floor CURRENT LIMIT Current Limit Threshold Pulse Qualification Count SUPPLY VOLTAGE LIMIT Under Voltage LockOut Split Single VUVLO VUVLO VPOS VNEG VPOS, VNEG tied to GND +5 -5 10 V Stereo Stereo VMUTE SNR VN GSYS RL=8 Stereo Stereo VXTALK BW PO PO THD+N THD+N THD+N PO VPOS/VNEG=12V; THD+N < 1% VPOS/VNEG=12V; THD+N < 10% VPOS/VNEG=12V; THD+N < 1% VPOS/VNEG=12V; THD+N < 10% VPOS-VNEG=12V; THD+N < 1% VPOS-VNEG=12V; THD+N < 10% VPOS/VNEG=12V ;Pout=1W, FIN=1KHz VPOS/VNEG=12V ;Pout=1W, FIN=20~20KHz VPOS/VNEG=12V ;Pout=1W, FIN=1KHz VPOS/VNEG=12V ;Pout=1W, FIN=20~20KHz VPOS-VNEG=12V;Pout=1W, FIN=1KHz VPOS/VNEG=12V ;Pout=1W, FIN=20~20KHz VPOS/VNEG=12V, Pout=Max, THD+N<1% VPOS/VNEG=12V, Pout=Max, THD+N<1% Pout=1W, F=1KHz Pout=1W, F=20-20KHz RL=8 VIN=200mVrms, F=20Hz~20KHz VIN=200mVrms, F=20Hz~20KHz VIN=200mVrms, F=20Hz~20KHz Input short, system muted, stereo Input short, system muted, BTL 20-20KHz, non A-Weighted, 8 20-20KHz, non A-Weighted, 4 Input short, non A-Weighted @ 20-20KHz, 8 Input short, non A-weighted @ 20-20KHz, 4 89 80 91 % 85 -60 2 26 20 14 -60 -60 85 89 400 300 3.75 Any 4 out of 5 clock periods 4 4.0 dB dB VRMS dB 3 dB dB 0.05 0.08 7 9 12 16 25 32 0.05 0.08 0.5 0.1 0.3 0.08 0.3 % W Symbol Test Conditions Min LX1725 Typ Max Units
WWW .Microsemi .C OM
Total Harmonic Distortion Stereo
ITH
A cycles
ELECTRICALS ELECTRICALS
Note: Characteristics done by system module evaluation.
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
7
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
SIMPLIFIED BLOCK DIAGRAM
WWW .Microsemi .C OM
STBY
V5V VREF FLAG SYNC COSC MASTER MUTE INM INP
VCOM
MUTE
OVP & OTP & UVLO & Reference
FAULT
VPOS VNEG
OSC Level Shift
VPOS
High Side Driver
+ Mute
+
ILIMITT
-
Fault
RILIM
+ VREF Timer
ILIMITB
VPOS VNEG
-
+ +
EAOUT
-
VREF
Level Shift Low Side Driver
VGND
+ -
VGND
FB
Figure 1 - Simplified Block Diagram (half of the circuit)
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
+
+ VCOM
OUT VCOM
VNEG
B D BLOCK DIAGRAM
Page 8
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
FUNCTION DESCRIPTION
WWW .Microsemi .C OM
OSCILLATOR LX1725 has a fixed PWM modulation frequency, but it is programmable by using an external capacitor connected to COSC pin to GND. The switching frequency is approximately 235KHz with capacitor's value 220pF. With the capacitor value given, the switching frequency can be calculated as follows: FOSC = 52000 / COSC FOSC in KHz, and COSC in pF. The suggested switching frequency is 250KHz SYNCHRONIZATION Two or more LX1725 oscillators can be configured for synchronous operation. One unit, the master, is programmed for the desired frequency with COSC as usual, also with the MASTER pin tied to V5V. The SYNC pin and the COSC pin of the slave units should be tied to the SYNC pin and the COSC pin of the master unit respectively. The MASTER pin of slave components is tied to GND. In this configuration, the SYNC pins of the slave units begin receiving instead of transmitting clock pulses. Also, the COSC pins quit driving the PWM capacitor in the slave units. Note that for optimum performance, all slave units should be located as close to the master unit as possible (Figure 2).
SYNC
STBY
Output PWM err amp
65536 clock cycles
FLAG
LX1725
(Master)
Cosc Master
V5V
Figure 3 - Power-On-Reset Timing Sequence The MASTER pin, as mentioned in SYNCHRONIZATION, is for multi devices operation. It is also a Quad-level control pin with three thresholds to enable Master/Slave and the "Quick" test mode. Quick mode forces the internal 65536 clock counter to be bypassed in order to speed-up production testing; this is usually for factory production test purposes. V @ Master Mode < V5V/4 Slave, Normal Mode < V5V/2, >V5V/4 Slave, Quick mode < 3*V5V/4, >V5V/2 Master, Quick mode > 3*V5V/4 Master, Normal mode GAIN SELECTION/MUTE The channel gain can be programmed between 26dB and 20dB by setting the HIGAIN pin to V5V or to GND. The MUTE pin is a Tri-level control pin for test purposes. When this pin is set to greater than V5V/2, the audio signal path is muted. For voltages between V5V/4 and V5V/2, the audio gain will be reduced by 6dB. This allows the "Low Gain" mode to be tested. For voltages less than V5V/4, the normal gain is in place (Figure 4).
V5V
MUTE 14dB
SYNC
LX1725
(Slave)
Cosc Master
Figure 2 - Two Devices Synchronized Block Diagram POWER ON RESET (POR) At start up or upon recovery from a fault condition, an internal "hiccup" counter counts 65536 clock cycles before allowing the outputs to begin switching. See the POR timing sequence in Figure 3.
DESCRIPTION DESCRIPTION
2R
14dB MUTE
LX1725
(Master)
R
20dB
Figure 4 - Gain Selection Block Diagram
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
9
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
FUNCTION DESCRIPTION(CONTINUED)
WWW .Microsemi .C OM
THERMAL PROTECTION When the junction temperature exceeds 125C, the gain is reduced by 6dB (gain fold back) to reduce the output power and on-chip power dissipation., when the temperature drops below 110C the gain will returns to normal. When the temperature exceeds 155C OVER CURRENT LIMIT the outputs are shut off to force the output current to zero. Again, The LX1725 has built-in over circuit protection. The circuit works when the temperature drops below 130C the outputs are allowed by monitoring the voltage drop across whichever power FET is to switch and normal operation resumes. active. When this voltage is greater than a certain threshold, an over-current condition is assumed. If this condition occurs during AUDIO INPUT five consecutive clock cycles, then the output transistors are For a high common mode rejection ratio and a maximum immediately disabled. The hiccup counter then counts 65536 clock flexibility in the application, the audio inputs are fully differential. cycles before allowing the outputs to begin switching again. By connecting the inputs anti-parallel the phase of one of the During this period the FLAG pin goes to HIGH to indicate a channels can be inverted, so that a load can be connected between system fault. A "hiccup" condition will be clearly audible if a the two output filters. In this case the system operates as a mono speaker is connected to the outputs. The threshold for the over- BTL amplifier and with the same loudspeaker impedance an current condition is set to 3.75A. approximately four times higher output power can be obtained. The over current circuit hiccup protection can be disabled by The input configuration for a mono BTL application is illustrated pulling the RILIM pin to V5V. in Figure 6. In the stereo single-ended configuration it is also recommended to connect the two differential inputs in anti-phase. UNDER VOLTAGE LOCK-OUT (UVLO) This has advantages for the current handling of the power supply at If the voltage drops below 5V under dual supply operation or 10V low signal frequencies. under single supply operation, the under voltage lock out circuit is Vref activated and the LX1725 will enter the standby mode. This switch-off will be silent and without pop noise. It will be recovered IN1+ when the supply voltage rises above the threshold level. OUT1 The FLAG pin will go logic HIGH to indicate the system fault. A IN1similar circuit monitors V5V with a threshold of 4V. STAND BY Forcing the STBY pin high puts the LX1725 into a zero current sleep mode. The outputs enter a high impedance mode and all internal bias circuits are disabled.
Vref IN2+ OUT2 IN2-
LX1725
Figure 6 - Audio Input Block Diagram
DESCRIPTION DESCRIPTION
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
10
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
TEST CIRCUIT SCHEMATIC
WWW .Microsemi .C OM
V5V
V5V
C6 0.1F 35V
C7 1F 35V IN1IN1+ C8 1F 35V
R100 0
OUTREF1
HIGAIN
VCOM
N.C.
IN1P
N.C.
IN1N
V5V
STBY VPOS
VPOS
VPOSA VCOMA
C100 0.1F 35V SYNC FLAG R1 25K + C12 1F 35V C11 220pF
STBY VPOS1 OUT1
JP1
C14 0.1F + C103 35V 10F 35V
L1 47H C18 0.68F 50V VNEG L2 47H C19 0.68F 50V OUT2+ OUT2OUT1+ OUT1-
SYNC FLAG RILIM VREF COSC OUTREF2 VNEGA VNEGA IN2N IN2P N.C. N.C. VGND MUTE
LX1725
VNEG1 VNEG2 OUT2 VPOS2 MASTER
C106 C15 + 10F 35V 0.1F 35V
JP2
C101 0.1F 35V VNEG
VPOS MASTER
C9 1F 35V IN2IN2+ C10 1F 35V V5V VNEGA V5V R104 5K 1% V5V V5V AGND + C5 10F 35V R103 6K 1% Master VPOS VPOS PGND V5V VNEG C2 470F 35V C4 0.1F 35V VNEG R107 6K 1% R102 10K STBY FLAG SYNC C1 470F 35V C3 0.1F 35V R105 4K 1% R101 10K V5 R106 3K 1% Master MUTE
Figure 7 - Test Circuit Schematic (Stereo, Split Supply)
APPLICATIONS APPLICATIONS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
11
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
TEST SYSTEM SET-UP
WWW .Microsemi .C OM
NORM
STBY
VCOM CTR
GND
TB4
+5V
TB3
Power Supply
GND
+5V AGND
JP5
Single
JP3 JP4
Dual
VPOS GND VNEG
TB1
+V GND -V
Power Supply
OUT1-
J1
IN1IN1+ OUT1+
Audio Precision
OUT1+ GND OUT2OUT2+
IN1+ RL IN1IN2RL IN2+
OUT1-
LX1725
IN2IN2+
J2
OUT2OUT2+
TB2
System One
Audio Precision System One
JP7
14dB 20dB MNOR MQUK SNOR MUTE SQUK
JP6
LX1725 Evaluation Module
Oscilloscope
Figure 8 - System Test Set-up
TEST SYSTEM CONFIGURATION
VPOS
VPOS1
VPOS
VCOM VPOS1
VCOMA
VCOM
BTL
& Logic
VNEG1 VNEG2
RL
& Logic
VNEG2
VNEG VNEG Filterless
BTL
VCOMA
VGND
1k VGND
Driver
LX1725
VPOS
VPOS2
1k
Filterless
Filterless RL
Driver
VNEG1
RL
APPLICATIONS APPLICATIONS
RL
Filterless RL
RL
LX1725
VPOS2
VPOS
Figure 9 - System Test Configuration
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
12
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
THD+N VS POWER
100 100
THD+N VS. POWER
WWW .Microsemi .C OM
10
8OHM Load, Fin=1KHz 10Hz~22KHz BPF 18V
24V
10
8OHM Load, Fin=1KHz 10Hz~22KHz BPF 9V
12V
1 0.21647 0.1 0.059 0.01
1 0.21647 0.1 0.059 0.01
14.5V
%
29V
%
0.001
0.001
0.0001
60m 100m
200m
500m 1.025 1 W
2
4.181 5
10
20
50
0.0001
60m 100m
200m
500m 1.025 1 W
2
4.181 5
10
20
50
THD+N VS POWER
100 50 10 10.9991
THD+N VS. POWER
100 50
4OHM Load, Fin=1KHz 10Hz~22KHz BPF
24V
10 10.9991
4OHM Load, Fin=1KHz 10Hz~22KHz BPF 9V
12V
1 0.59672 % 0.1
18V
1 0.59672
14.5V
29V
%
0.1
0.01
0.01
0.001
0.001
0.0001
60m 100m
200m
500m
1 W
2
5
10.23 13.76 20 10
0.0001
50
60m 100m
200m
500m
1 W
2
5
10.23 13.76 20 10
50
THD+N VS POWER
100
100
THD+N VS. POWER
8OHM Load, Fin=1KHz 10Hz~22KHz BPF, BTL
10
12V
10
8OHM Load , Fin=1KHz 10Hz~22KHz BPF , BTL 20V
24V
10V
1 % 0.1
1
30V
15V
% 0.1
CHARTS CHARTS
0.01
0.01
0. 001 60m 200m 500m 1 2 W 5 10 20 50 100
0. 001
60m
200m
500m
1
2 W
5
10
20
50 100
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
13
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
THD+N VS. FREQUENCY
dx=0.00000 Hz 100
100
THD+N VS. FREQUENCY
WWW .Microsemi .C OM
8OHM Load, Po=1W 10Hz~22KHz BPF
10
10
8OHM Load , Po=1W 10Hz~22KHz BPF 20V 24V 30V
1 % 0.1
10V 12V 15V
%
1
0.1
0. 01
0. 01
0. 001 20
0. 001 20
50 100 200 500 Hz 1k 2k 5k 10k 20k
50
100
200
500 Hz
1k
2k
5k
10k 20k
THD+N VS. FREQUENCY
100 50 10
THD+N VS. FREQUENCY
100
dx=-4.0228 kHz
4OHM Load , Po=1W 10Hz~22KHz BPF
4OHM Load, Po=1W 10Hz~22KHz BPF 20V 24V 30V
10
1 % 0.1
10V 12V 15V
%
1
0.1
0. 01
0. 01
0. 001 20
50
100
200
500 Hz
1k
2k
5k
10k 20k
0. 001 20
50
100
200
500 Hz
1k
2k
5k
10k 20k
THD+N VS. FREQUENCY
100
THD+N VS. FREQUENCY
100
10
8OHM Load, Po=1W 10Hz~22KHz BPF , BTL 10V 12V
%
10
8OHM Load , Po=1W 10Hz~22KHz BPF , BTL 20V 24V
1 % 0.1
1
0.1
CHARTS CHARTS
15V
0. 01
30V
0. 01
0. 001 20
50
100
200
500 Hz
1k
2k
5k
10k 20k
0. 001
20
50
100
200
500 Hz
1k
2k
5k
10k 20k
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
14
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
GAIN @ 20 - 20KHZ
+30 +28 +26 +24 +22 +20 +18 d +16 B +14 r +12 +10 +8 +6 +4 +2 -0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k
GAIN @ 20 - 20KHZ
+ 30
8OHM Load , Vin=200mVrms 10Hz~80KHz BPF , +/-12V
WWW .Microsemi .C OM
26dB
+ 28 + 26 + 24 + 22
4OHM Load , Vin=200mVrms 10Hz~80KHz BPF , +/-12V
26dB
Note 1
20dB
+ 20 + 18
20dB
14dB
d + 16 B + 14 r + 12 + 10 +8 +6 +4 +2 -0 20 50 100 200 500 1k Hz
14dB
2k
5k
10k
20k
80k
GAIN @ 20 - 20KHZ
+ 30 + 28 + 26 + 24 + 22 + 20 + 18 d + 16 B + 14 r + 12 + 10 +8 +6 +4 +2 0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k
GAIN @ 20 - 20KHZ
+30 +27.5 +25 +22.5
8OHM Load , Vin=200mVrms 10Hz~80KHz BPF , 24V
26dB
4OHM Load, Vin=200mVrms 10Hz~80KHz BPF, 24V
26dB
20dB
+20 +17.5
20dB
14dB
d B r
+15 +12.5 +10
14dB
Note 2
+7.5 +5 +2.5 +0 20 50 100 200 500 1k Hz 2k 5k 10k 20k 80k
Note 1 - The output LC filter are based on 8OHM design, L=47uH, C=0.68uF, the 4OHM load LC filter design please refer to the application notes. Note 2 - At single supply mode, the output AC coupling capacitor value based on 470uF, for lower cut-off frequency, please refer to the application notes.
CHARTS CHARTS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
15
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
IQQ VS. SUPPLY VOLTAGE
20 18 16 14 12 10 8 6 6 7 8 9 10 11 12 13 14 15 Supply (+/-V)
90 70 50 30 10 -10 Offset -30 -50 -70 -90 -110 -130 -150 6
DC OFFSET @SUPPLY
WWW .Microsemi .C OM
Iqq (mA)
8
10
12
14
16
Supply Voltage (+/-V) CH1 CH2
IPOS
INEG
IQQ (POS) VS. SW FREQUENCY
30
IQQ (NEG) VS. SW FREQUENCY
30
25
25
Iqq(mA)
15
+12 V +10 V +8V
Iqq(mA)
20
+15 V
20
15
+15V +12V +10 V +8V
10 +6V 5 100
10
150
200
250
300
350
400
450
500
5 100
+6V 150 200 250 300 350 400 450 500
SW Frequency(Khz)
SW Frequency(Khz)
EFFICIENCY @8OHM LOAD
1200 1000 Current (mA) 800 600 400 200 0 0.1 0.5 1 23 IPOS 4 5 67 INEG 8 9 10 11 12 13 EFFICIENCY Power (W) 100.00% 90.00% 80.00% 70.00% 60.00% 50.00% 40.00% 30.00% 20.00% 10.00% 0.00%
EFFICIENCY @4OHM LOAD
1600 1400 1200 Current (mA) 1000 800 40.00% 600 400 200 0 0.1 0.5 1 2 3
IPOS
90.00% 80.00% 70.00% 60.00% 50.00%
30.00% 20.00% 10.00% 0.00% 4 5678 Power (W)
INEG
9 10 11 12 13
CHARTS CHARTS
EFFICIENY
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
16
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
POWER VS. SUPPLY @8OHM
16 14 12 Power (W)
Power (W)
POWER VS. SUPPLY @4OHM
25
WWW .Microsemi .C OM
20
10 8 6 4
15
10
5
2 0 6 7 8 9 10 11 12 13 14 15 Supply (+/-V) 1%THD 10%THD
0 6 7 8 9 10 11 12 13 14 15 Supply (+/-V) 1%THD 10%THD
POWER VS. SUPPLY @8OHM BTL
50 45 40 35 Power (W) 25 20 15 10 5 0 6 7 8 9 10 11 12 13 14 15
SW Freq (Khz)
SW FREQUENCY VS. COSC
500 450 400 350 300 250 200 150 100 100
30
150
200
250 CAP Value (pF)
300
350
400
Supply (+/-V) 1%THD 10%THD
NOISE FLOOR @20-20KHZ
+0 -20 -40 d -60 B V -80 -100
+/-12V, Gain =20dB, input shorted 10~22KHz BPF , non A-Weighted
@8OHM, Noise V N= 400uVrms @4OHM, Noise V N= 290uVrms
8OHM
CHARTS
-120 -140 20 50 100 200 500 Hz 1k 2k 5k
4OHM
10k 20k
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
17
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
APPLICATION SCHEMATICS
WWW .Microsemi .C OM
HIGAIN +5V IN1P 1F IN1N 1F
32 IN1P 31 30 29 28 27 26 25 VCOM
4.7F 35V VCOM
HIGAIN
IN1M
N.C.
N.C.
VPOS VCOM Sychronize FLAG 1F 35V 50K
1 2 3 4 5 6 7
OUTREF1
V5V
STBY
24
VPOSA
STBY
VPOS
23 22 21 20 19 18 17
VCOMA SYNC FLAG RILIM VREF
VPOS1 OUT1
22H VNEG
LX1725
OUTREF2
VNEG1 VNEG2 OUT2
820nF
820nF 22H VPOS
150 - 220pF VNEG
IN2M
8
VGND 15
N.C.
N.C.
VNEGA IN2P
VNEGA
COSC
VPOS2
MASTER MUTE 16
9
10
11
12
13
14
IN2P
1F Master / Slave 1F MUTE / GAIN VNEGA
IN2N
VPOS
APPLICATIONS APPLICATIONS
0.1F 50V
470F 35V
0.1F 50V Note: This design for Typical 4 load, other than 4. Please refer to application notes AN-35 to change L.C. value
470F 35V VNEG
Figure 17 - Application Schematic (Stereo, Split Supply)
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
18
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
APPLICATION SCHEMATICS (CONTINUED)
WWW .Microsemi .C OM
HIGAIN VCOM +5V IN1P 1F IN1N 1F STBY
IN1P
32 IN1P 31 30 29 28 27 26 25 VCOM
+5V IN1P 4.7F 35V VCOM IN1N
4.7F 35V VCOM
32
31
30
29
28
27
26
25 VCOM
IN1M
OUTREF1
N.C.
N.C.
HIGAIN
V5V
STBY
24
N.C.
IN1M
N.C.
HIGAIN
OUTREF1
V5V
VPOS
24 23 22 21 20 19 18 17
VPOS VCOM
820nF
1 2 3 4
VPOSA
STBY 23 22 21 20 19 18 17
VPOS
VPOS VCOM Sychronize FLAG 1F 35V 50K
1 2 3 4 5 6 7
VPOSA
VCOMA SYNC FLAG RILIM VREF
VPOS1 OUT1
STBY
VCOMA SYNC FLAG RILIM VREF
VPOS1 OUT1
Sychronize FLAG 50K 1F 35V
22H VNEG
5 6 7
LX1725
OUTREF2
VNEG1 VNEG2 OUT2 VPOS2
VNEG
LX1725
OUTREF2
VNEG1 VNEG2 OUT2
COSC IN2M N.C. N.C.
VNEGA IN2P
VNEGA
22H
820nF
150 - 220pF VNEG
8
VGND
150 - 220pF VNEG
IN2M
8
VGND
N.C.
N.C.
VNEGA IN2P
VNEGA
MASTER MUTE
VPOS
9
10
11
12
13
14
15
16
9
10
11
12
13
14
15
16
IN2P
Master / Slave MUTE / GAIN
MUTE
COSC
VPOS2
MASTER
VPOS
IN2P
1F
Master / Slave MUTE / GAIN
IN2N
IN2N VCOM
1F
VNEGA
VPOS VNEGA VCOM 1K 1.2K
VPOS
0.1F 50V 1000F 35V
Note: This design for Typical 4 load, other than 4. Please refer to application notes AN-35 to change L.C. value
VNEG
0.1F 50V
470F 35V
0.1F 50V
470F 35V VNEG
Figure 18 - Application Schematic (Stereo, Single Supply)
Figure 19 - Application Schematic (BTL, Split Supply)
HIGAIN VCOM +5V IN1P 4.7F 35V VCOM IN1N
32 IN1P
31
30
29
28
27
26 VCOM
25
N.C.
N.C.
REFOUT1
HIGAIN
IN1M
V5V
STBY
24
VPOS VCOM Sychronize FLAG 1F 35V 50K
1 2 3 4 5 6 7
VPOSA
STBY
VPOS
23 22 21 20 19 18 17
VCOMA SYNC FLAG RILIM VREF
VPOS1 OUT1
LX1725
REFOUT2
VNEG1 VNEG2 OUT2
VNEG
150 - 220pF VNEG
VNEGA
COSC IN2M N.C. N.C.
VNEGA IN2P
VPOS2
VGND MASTER MUTE
8
VPOS
9
10
11
12
13
14
15
16
IN2P
Master / Slave MUTE / GAIN
APPLICATIONS APPLICATIONS
IN2N
VCOM VNEGA 1.2 K VPOS
VCOM 1K
0.1F 50V
1000F 35V VNEG
Figure 20 - Application Schematic (BTL, Single Supply)
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
19
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
PCB DESIGN GUIDELINES
WWW .Microsemi .C OM
PCB DESIGN GUIDELINES One of the key efforts in implementing the MLP package on a pc board is the design of the land pattern. The MLP has rectangular metallized terminals exposed on the bottom surface of the package body. Electrical and mechanical connection between the component and the pc board is made by screen printing solder paste on the pc board and then reflowing the paste after placement. To guarantee reliable solder joints it is essential to design the land pattern to the MLP terminal pattern, exposed PAD, and Thermal PAD via. There are two basic designs for PCB land pads for the MLP: Copper Defined style (also known as Non Solder Mask Defined (NSMD)) and the Solder Mask Defined style (SMD). The industry has had some debate on the merits of both styles and although Microsemi recommends the Copper Defined style land pad (NSMD), both styles are acceptable for use with the MLP package. NSMD pads are recommended over SMD pads due to the tighter tolerance on copper etching than solder masking. NSDM by definition also provides a larger copper pad area and allows the solder to anchor to the edges of the copper pads thus providing improved solder joint reliability. DESIGN OF PCB LAND PATTERN FOR PACKAGE TERMINALS As a general rule, the PCB lead finger pad (Y) should be designed 0.2-0.5mm longer than the package terminal length for good filleting. The pad length should extend 0.05mm towards the centerline of the package. The pad width (X) should be a minimum 0.05mm wider than the package terminal width (0.025mm per side), refer to figure 21. However, the pad width is reduced to the width of the component terminal for lead pitches below 0.65mm. This is done to minimize the risk of solder bridging.
EXPOSED PAD PCB DESIGN The construction of the Exposed Pad MLP enables enhanced thermal and electrical characteristics. In order to take full advantage of this feature the exposed pad must be physically connected to the PCB substrate with solder. The exposed pad is internally connected to the die substrate potential which is VNEG so it is very important that the PCB substrate potential be connected to VNEG as well. The thermal pad (D2th) should be greater than D2 of the MLP whenever possible; however adequate clearance (Cpl > 0.15mm) must be met to prevent solder bridging. If this clearance cannot be met, then D2th should be reduced in area. The formula would be: D2TH >D2 only if D2TH < Gmin - (2 x Cpl). THERMAL PAD VIA DESIGN There are two types of on-board thermal PAD designs: one is using thermal vias to sink the heat to the other layer with metal traces. Based on the Jedec Specification (JESD 51-5) the thermal vias should be designed like Figure 22. Another one is the no via thermal PAD which is using the same side copper PAD as heat sink, this type of thermal PAD is good for a two layer board, since the bottom side is filled with all other kinds of trace also, it's hard to use the whole plane for the heat sink. But you still can use vias to sink the heat to the bottom layer by the metal traces, then layout a NMSD on which a metal heat sink is put to sink the heat to the air.
Part
Part Lead Solder PCB Pad PCB
Micro Lead Quad Package Land Pattern
(X1) Min: 0.025mm Per side for lead pitches > 0.65mm
Land Pattern for Four Layer Board with Vias
APPLICATIONS APPLICATIONS
0.05mm Y2
0.20mm Y1
Figure 22 - Comparison of land pattern theory
Figure 21 - PC Board Land Pattern Geometry for MLP Terminals
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
20
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
PCB DESIGN GUIDELINES (CONTINUED)
The LX1725 is supplied in an MLPQ-7mmx7mm, 32 pin package. JA =29.3C/W for the package by itself in still air. When running at a continuous 20W output power, the on-chip power dissipation will be 3.5W assuming 85% efficiency. With no reduction in the thermal resistance, the die temperature will rise 103 above ambient. JC is about 4C/W. If the exposed pad is properly connected to a heat sink, then the temperature rise will be reduced to around 16C under these condition. So the non-via type thermal PAD is suggested.
~0.85mm
Zmin= D + aaa + 2(0.2) (where pkg body tolerance aaa=0.15) (where 0.2 is outer pad extension) Gmin= D-2(Lmax)-2(0.05) (where 0.05 is inner pad extension) (Lmax=0.50 for this example) D2th max = Gmin-2(CpL) (where CpL=0.2)
WWW .Microsemi .C OM
~0.025mm
Zmin ~7.45mm
D2th ~5.15mm ~0.355mm 0.305mm 1.2mm Gmin ~6.00mm
O 0.3mm
5.00mm
Figure 23 - Recommended Land Pad with Vias for LQ32 (7mm)
APPLICATIONS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
21
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
PACKAGE DIMENSIONS
WWW .Microsemi .C OM
LQ
32-Pin Package Description (Micro Lead Quad Package)
D b E2
L
E
D2
e
A1 A3
A
Dim A A1 A3 b D D2 E E2 e L
MILLIMETERS MIN MAX 0.80 1.00 0 0.05 0.25 REF 0.23 0.38 7.00 BSC 5.00 5.25 7.00 BSC 5.00 5.25 0.65 BSC 0.45 0.65
INCHES MIN MAX 0.031 0.039 0 0.002 0.010 0.009 0.015 0.276 BSC 0.197 0.207 0.276 BSC 0.197 0.207 0.026 0.018 0.026
Note:
Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006") on any side. Lead dimension shall not include solder coverage.
MECHANICALS MECHANICALS
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
22
LX1725
TM (R)
15W+15W Stereo Class-D Amplifier Filterless 30W Mono in BTL PRODUCTION DATA SHEET
NOTES
WWW .Microsemi .C OM
NOTES NOTES
PRODUCTION DATA - Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright (c) 2004 Rev. 1.2, 2005-12-06
Microsemi
Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page
23

▲Up To Search▲

Price & Availability of LX1725

	To Download LX1725 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .